RAAAM™ Technologies provides the highest-density embedded memory in any standard CMOS technology

Careers

Position:

Senior Silicon Validation Engineer

Job description

Lead the silicon validation and qualification of RAAAM™’s memory technology.

Responsibilities

  • Silicon validation and characterization through the entire process from silicon fabrication to measurements and characterization.
  • Manage the post-silicon operations with relevant service providers (foundries, assembly house, measurement laboratories).
  • Perform silicon characterization runs over multiple chip samples across corners and various operating conditions.
  • Test and verify failures in Printed Circuit Board (opens, shorts, etc.)
  • Setup and development of test automation scripts using C / Python coding.
  • Documentation of silicon validation results, characterization, and conclusions.

Qualifications

  • 10+ years of experience with silicon validation.
  • Experience with silicon qualification (Advantage: semiconductor IP qualification).
  • Experience in lab measurements and debugging (oscilloscope, multimeter, etc.)
  • Programming experience with C / Python coding.
  • Experience with Printed Circuit Board assembly (soldering components, debugging, etc.)
  • Ability to work independently and carefully on technical setups.

Location

  • Israel

Full / Part Time

  • Full time

Position:

Design Verification Engineer

Job description

Verification of RAAAM™’s SoC and memory controller logic.

Responsibilities

  • Enhance existing verification methodologies and develop new ones.
  • Run, analyse and debug tests.
  • Build and run regressions.
  • Collect coverage.

Qualifications

  • 3+ years of experience with logic verification.
  • Experience with embedded systems, an advantage.
  • Experience with Cadence EDA environment (Xcelium, Vmanager) an advantage.
  • High proficiency in scripting, automation, and Linux environments.
  • Good knowledge and experience with Python coding.
  • BSc. degree in Electrical / Computer Engineering.

Location

  • Israel or Switzerland

Full / Part Time

  • Full time

Position:

VLSI Circuit Design

Job description

Analog / Digital transistor-level circuit verification of RAAAM™’s next generation embedded memories
in advanced CMOS technologies.

Responsibilities

  • Design of RAAAM’s embedded memories in advanced CMOS technologies.
  • Analysis and optimization of read and write critical paths.
  • Top-level Analog verification and characterization of all circuit components.
  • Automation of design verification flows.
  • Generation of back-end views for chip integration.

Qualifications

  • 5+ years of experience with full-custom circuit design (Schematics, Layout, Verification).
  • Experience in advanced process node circuit design (16nm and below).
  • Experience with Cadence EDA environment (Virtuoso/Composer/Layout).
  • High proficiency in scripting, automation, and Linux environments.
  • Good knowledge and experience with Python coding.
  • BSc. degree in Electrical / Computer Engineering.

Location

  • Israel or Switzerland

Full / Part Time

  • Full time

Position:

VLSI Circuit Layout

Job description

Analog / Digital circuit layout design on transistor level of RAAAM’s next-generation embedded memories in advanced CMOS technologies.

Responsibilities

  • Memory bit cell layout and high-density optimization.
  • Digital and Analog circuit layout in advanced process nodes (e.g. 16nm, 5nm, and below).
  • Extraction (QRC) and layout optimization for reduced parasitic components.
  • Working with circuit/architecture design teams to meet design criteria.

Qualifications

  • 5+ years of experience with full-custom circuit design (e.g. 16nm, 5nm, and below).
  • Experience in the layout of SRAM blocks and standard cells.
  • Experience with Cadence EDA (Virtuoso/Composer/Layout).
  • Advantage: Skill knowledge.

Location

  • Switzerland, Israel, Remote

Full / Part Time

  • Full time

Send resume to email: info@raaam-tech.com

RAAAM™ Technologies provides the highest-density embedded memory in any standard CMOS technology

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