RAAAM™ provides the highest-density on-chip
in any standard CMOS technology with up to 50% area reduction
and upto 10X power reduction
Memory has become a major bottleneck for applications such as AR/VR, Machine Learning (ML), Internet-of-Things (IoT), and Automotive, limiting industry growth. Today’s predominant on-chip memory solution, based on SRAM, already accounts for over 50% of that total area of modern systems-on-a-chip (SoCs), and its overhead is expected to grow further as SRAM no longer provides the density requirements of modern systems, reaching the end of its scaling in advanced CMOS technologies.
RAAAM™’s patented and silicon-proven technology provides up-to 50% area reduction over high-density SRAM and up-to 10X power reduction at no additional cost. It is fully compatible with standard CMOS and can be used as a drop-in SRAM replacement in any SoC, allowing to significantly reduce fabrication costs through die size reduction or enable a dramatic improvement in system performance by increasing the on-chip memory capacity in the same die size, enabling industry growth for applications in the areas of AR/VR, Machine Learning (ML), Internet-of-Things (IoT), and Automotive.